Can I leave off the bypass capacitors in low-frequency digital logic systems?

I know it's good practice to use bypass capacitors near the power pins of your ICs, but I'm now moving on from the breadboarding stage to the PCB-design stage, and I'd like to know if there are any good rules of thumb for when the caps are actually needed.

The relevant factor is the rise or fall times, not the clock rate.

Conventionally, designers stick to a 100nF cap per IC. Bear in mind that they serve multiple purposes:

  • Signal integrity
  • Power supply noise
  • Internal IC operation
  • Radiated EMI
  • Susceptibility to EMI

Using an SMT 0805 or smaller (smaller is better) shouldn’t take too much board space.

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Oliver Smith

Oliver is an experienced electronics engineer skilled in PCB design, analog circuits, embedded systems, and prototyping. His deep knowledge spans schematic capture, firmware coding, simulation, layout, testing, and troubleshooting. Oliver excels at taking projects from concept to mass production using his electrical design talents and mechanical aptitude.
Picture of Oliver Smith

Oliver Smith

Oliver is an experienced electronics engineer skilled in PCB design, analog circuits, embedded systems, and prototyping. His deep knowledge spans schematic capture, firmware coding, simulation, layout, testing, and troubleshooting. Oliver excels at taking projects from concept to mass production using his electrical design talents and mechanical aptitude.

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